Based on the TCLS ARM FOR SPACE SoC Requirements Specification gernerated within the WP2, will be analysed and defined an architectural concept of a TCLS ARM-based System-On-Chip.
The interfaces will be identified and the peripheral building blocks will be selected.
The critical performances will be identified and allocated.
In adition will also be identified the reduced architecture of a demonstrator and the reduced architecture of the SoC that will support the Feasibility Study. Theses architectures will focus on the critical blocks in order to achieve the TCLS ARM FOR SPACE objectives while keeping the study compatible with the allocated budget.
Tests plans for the demonstrator will also be produced within this WP.